
	;INCLUDE ../inc/option.inc
;Interrupt Control
wINTMODE	EQU		0x1ffc000
wINTPEND	EQU		0x1ffc004
wINTMASK	EQU		0x1ffc008
bP0    		EQU 	0x1ffb000   
bP1   	 	EQU 	0x1ffb001   
bP2 		EQU 	0x1ffb002   
bP0CON 		EQU 	0x1ffb010 
bP1CON		EQU 	0x1ffb012 
bP0PUR    	EQU 	0x1ffb015   
bP1PUDR  	EQU 	0x1ffb016   
rT0DATA		EQU		0x1ff9000		; U16
rT4DATA		EQU		0x1ff9040		; U16
rT4PRE		EQU		0x1ff9042		; U8
rT4CON		EQU		0x1ff9043		; U8
rT4CNT		EQU		0x1ff9046		; U16

SIM_RX_INT_BIT	EQU		0x20000		; EINT0 (P05)
SIM_RX_TMR_INT_BIT	EQU		0x1000		; T4 MC
SIM_RX_IO		EQU		0x20		; P05
ISR_VECTOR_FLG  EQU 	0			; Flag of ISR Vector Mode; 1: Vector Mode, 0: Normal Mode	
	
	
rUART2P0		RN	r10
rUART2BitCNT	RN  r11
rUART2DATA		RN  r12

	EXPORT HandlerEINT_FIQ
	EXPORT HandlerT4MC_FIQ

	IMPORT rUART2Base
	IMPORT drv_uart2_byte_proc
	IMPORT drv_uart2_bit_sample

	PRESERVE8
	AREA	Drv_uart2, CODE, READONLY

;;*****************************************************************
;;  HandlerEINT_FIQ
;;  EINT1 interrupt ISR ( FIQ Mode )
;;*****************************************************************
HandlerEINT_FIQ				;; 0x24 clock( vector ), 0x2A( no vector mode )
	
	;void drv_uart2_exti_isr( void )
	;{
	;// Check multi-point $$$$$$$$$$$$
	;// Check EINT1 PIN.
	;if ( 0 == (rP0&BIT5))
	ldr      rUART2P0,=bP0 ; = #0x01ffb000
	ldrb     r8,[rUART2P0]
	tst      r8,#SIM_RX_IO		; P05
	bne      EINT1_FIQ_END  ; (drv_uart2_exti_isr + 0x44)
	;{
	;// Start timer 0
	;rT4DATA = rUART2Base.m_rU2TMR0;
	ldr      r9,=rUART2Base ; = #0x01fe001c
	ldrh     r9,[r9,#0]
	ldr      r8,=rT0DATA	; = #0x01ff9000
	strh     r9,[r8,#0x40]
	;rT4CON = (BIT6|BIT7);		// Interval mode
	mov      r9,#0xc0
	strb     r9,[r8,#0x43]

	; Check Start bit

	stmfd  sp!, {r0-r3, r12, lr}       ; save all registers
	ldr		r9, =drv_uart2_bit_sample	; From stmfd --> ldmfd, total clocks: 0x137
	;bl       drv_uart2_byte_proc
	mov		lr,	PC
	bx		r9
	movs	r9,	r0
	; Pop R0-R3, LR
	ldmfd  sp!, {r0-r3, r12, lr}       ; restore all register
	;tst		r9,	#1
	bne      EINT1_FIQ_END2

	;rUART2Base.rU2RCNT = 0;	;; 0x62 clock
;   mov      r8,#0
;   strb     r8,[r10,#7]
	mov		rUART2BitCNT, #0	; Clear Bit counter
	mov		rUART2DATA,	#0		; Clear Shift register

	;// Disable EINT0 interrupt
	;rINTMASK &= (~BIT_EINT0);
	ldr      r8,=wINTPEND 	; = #0x01ffc008
	ldr      r9,[r8,#4]
	bic      r9,r9,#SIM_RX_INT_BIT	; BIT17(EINT0)
	str      r9,[r8,#4]
	;}
	;
	subs     pc,lr,#4  ; FIQ return ;; ISR total clocks: 0x140

EINT1_FIQ_END2
	;rT4CON = 0x00;		// Stop timer
	mov      r9,#0x00
	strb     r9,[r8,#0x43]

EINT1_FIQ_END
	;rINTPEND = (~BIT_EINT0);
	ldr      r8,=wINTPEND ; = #0x01ffc004
	mvn      r9,#SIM_RX_INT_BIT
	str      r9,[r8,#0]
	;}
	;[0xe12fff1e]   bx       r12
	;
	subs     pc,lr,#4  ; FIQ return


;;*****************************************************************
;;  HandlerT4MC_FIQ
;;  Timer4 interrupt ISR ( FIQ Mode )
;;*****************************************************************
HandlerT4MC_FIQ				;; 0x24 clock( vector ), 0x27( no vector mode )
	;volatile DRV_UART2_REG_T *p_uart2_reg;   
	;U8 bit_val;   
	;U8 bit_cnt;   
	   
	;if ( 0 == bit_cnt )
	cmp      rUART2BitCNT,#0
	beq      T4MC_FIQ_FIRST

T4MC_FIQ_IO_SAMPLE
	; bit_val =  ((rP0&SIM_RX_IO)>>5);   
;	ldrb     r8,[rUART2P0]

	; p_uart2_reg->m_rU2RDATA |= (bit_val<<bit_cnt++); 
;	IF SIM_RX_IO=0x20
;	mov      r8,r8,lsl #26		; P05
;	mov      r8,r8,lsr #31
;	ELSE
;	mov      r8,r8,lsl #25		; P06
;	mov      r8,r8,lsr #31
;	ENDIF
	stmfd  sp!, {r0-r3, r12, lr}       ; save all registers
	ldr		r8, =drv_uart2_bit_sample	; From stmfd --> ldmfd, total clocks: 0x137
	;bl       drv_uart2_byte_proc
	mov		lr,	PC
	bx		r8
	mov		r8,	r0
	; Pop R0-R3, LR
	ldmfd  sp!, {r0-r3, r12, lr}       ; restore all register

	mov      r9,r8,lsl rUART2BitCNT
	add      rUART2BitCNT,rUART2BitCNT,#1
	orr      rUART2DATA,rUART2DATA,r9
	cmp      rUART2BitCNT,#9
	; if ( rUART2Base.m_rU2RCNT>= DRV_UART2_DATA_LEN_PARITY)
	bhs      T4MC_FIQ_BYTE_PROC  ; (drv_uart2_tmr_isr + 0x80)
	; rINTPEND = (~BIT_T4MC);
	ldr      r8,=wINTPEND ;
	mvn      r9,#0x1000
	str      r9,[r8,#0]
	subs     pc,lr,#4  ; FIQ return	;; ISR total clocks: 0x6B( not first bit )


T4MC_FIQ_FIRST		; Fist bit. T0
	;{  ;
	ldr      r8,=0x01ff9000 ;   rT4 base	
	;	rT4CON = 0x00;
	strb     rUART2BitCNT, [r8,#0x43]
	;   rT4DATA = rUART2Base.m_rU2TMR1; ,0x00
	; p_uart2_reg = &rUART2Base;   
	ldr      r9,=rUART2Base ;
	ldrh     r9,[r9,#2]
	strh     r9,[r8,#0x40]
	; rT4CON = 0xC0;
	mov		 r9, #0xC0
	strb     r9, [r8,#0x43]
	; // Deley DRV_UART2_TM_TMR1.    ;; 0x60 clock 
	;	{      
	;		S32 delay = 4;         
	; mov      r8,#0x1				; Interrupt Vector mode
	mov      r8,#0x2
T4MC_FIQ_TMR1_LOOP
   	;		while( delay-- );         
	subs     r8,r8,#1
	bcs      T4MC_FIQ_TMR1_LOOP  ; (drv_uart2_tmr_isr + 0x34)
	nop
	nop
	nop
	nop
	IF ISR_VECTOR_FLG=0
	nop
	ENDIF
	;	}      
	;}
	b	T4MC_FIQ_IO_SAMPLE			; Return to sample level


T4MC_FIQ_BYTE_PROC		; One byte procedure
	;{  
	;   // Call Byte receive proc
	;   drv_uart2_byte_proc( rT4DATA ); b0]
	; Push R0-R3, LR
	stmfd  sp!, {r0-r3, lr}       ; save all registers
	mov     r0, rUART2DATA
	ldr		r8, =drv_uart2_byte_proc	; From stmfd --> ldmfd, total clocks: 0x137
	;bl       drv_uart2_byte_proc
	mov		lr,	PC
	bx		r8
	; Pop R0-R3, LR
	ldmfd  sp!, {r0-r3, lr}       ; restore all register
	;}
	; rUART2BitCNT = 9
	mov		rUART2BitCNT, #9	; This value for dispatch EINT0 or T4MC interrupt
	; rINTPEND = (~BIT_T4MC);
	ldr      r8,=wINTPEND ;
	mvn      r9,#SIM_RX_TMR_INT_BIT
	str      r9,[r8,#0]

	subs     pc,lr,#4  ; FIQ return	;; ISR total clocks: 0x64( not first bit )

	END

